Design Linked Incentive (DLI) Scheme

Implemented by: Ministry of Electronics and Information Technology (MeitY) under the Semicon India Programme.

Objective:

Create a globally competitive, self‑reliant fabless semiconductor design ecosystem.
Promote indigenous design, IP ownership and deployment in electronic products.

Financial Incentives:
Product Design Linked Incentive (PDLI): Reimbursement up to 50% of eligible expenditure, capped at ₹15 crore per application.
Deployment Linked Incentive (DLI): 4–6% of net sales turnover for five years, capped at ₹30 crore per application, subject to minimum sales and successful product deployment.
Eligibility:
Start‑ups (as per DPIIT Notification, 2019)
MSMEs (as per MSME Notification, 2020)
Domestic companies owned by resident Indian citizens in line with FDI Policy Circular, 2017.
Scope of Support:
Integrated Circuits (ICs), Chipsets, Systems‑on‑Chip (SoCs), systems, and IP cores.
Design Infrastructure:
Provided through ChipIN Centre (C‑DAC) – access to National EDA Tool Grid, IP core repositories, MPW prototyping, post‑silicon validation.
Achievements (as of Jan 2026):
24 chip‑design projects sanctioned (video surveillance, drone detection, energy meters, microprocessors, satellite communications, IoT SoCs).
ChipIN Centre supports ~1 lakh engineers & students across ~400 organisations.
Semicon India Programme (SIM) Outlay: ₹76,000 crore for semiconductor & display manufacturing plus design.
Related Capacity‑Building Initiatives:
Chips to Startup (C2S) Programme – target of ~85,000 industry‑ready professionals.
Microprocessor Development Programme – indigenous microprocessors VEGA, SHAKTI, AJIT.

Global Supply‑Chain Vulnerabilities: Recent disruptions highlighted the strategic importance of semiconductor design.
Value Chain Insight: Design & IP contribute >50% of a chip’s value, account for 20–50% of Bill of Materials, and drive 30–35% of global semiconductor sales.
Strategic Position of Fabless Firms: They sit at the core of innovation, performance, security and long‑term competitiveness.
India’s Gap: Lack of indigenous design forces dependence on imported core technologies, even when fabs are domestic.

Technology Self‑Reliance: Aligns with ‘Atmanirbhar Bharat’ and Make in India objectives.
Economic Impact: Higher value‑addition, export potential, and job creation in high‑skill sectors.
Security: Reduces reliance on foreign IP, enhancing cyber‑security and defence capabilities.
Policy Integration: Linked with Semicon India Programme, C‑DAC, C2S, and Microprocessor Development Programme, creating a holistic ecosystem.

Article 246 – Union List entry on ‘Electronics and Information Technology’ empowers the Centre to legislate and implement schemes like DLI.
FDI Policy (2017 Circular) – Governs foreign investment norms for eligible domestic companies.
DPIIT & MSME Notifications – Define eligibility criteria for start‑ups and MSMEs.